Skip to content

News

SemiWiki – Blog – AMS, RF and Digital Full Custom IC Designs need Circuit Sizing

User Blog by Daniel Payne on 09-21-2021 at 10:00 am My career started out by designing DRAM circuits at Intel, and we manually sized every transistor in the entire design to get the optimum performance, power and area. Yes, it was time consuming, required lots… Read More »SemiWiki – Blog – AMS, RF and Digital Full Custom IC Designs need Circuit Sizing

Yield-optimization of CMOS full-adder design with PVT variations and NBTI

We present the detailed results of the application of mathematical optimization algorithms to transistor sizing in a full-adder cell design, to obtain the maximum expected fabrication yield. The approach takes into account all the fabrication process parameter variations specified in an industrial PDK, in addition… Read More »Yield-optimization of CMOS full-adder design with PVT variations and NBTI

Let’s work together on your
next design project

Use MunEDA tools and support to speed up efficiency,
quality and outcome of your next circuit design project