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Analog Circuit Migration and Optimization from 28nm Bulk to 14nm FinFET Technology: A Case Study (SPT, WiCkeD)


  • Analog Design Migration
  • Performance & Yield Optimization
  • Design Flow Integration


Advanced process nodes utilize FinFET devices, for their improved performance and leakage power characteristics. The migration of existing analog IP from planar device technologies to FinFETs is complicated by the constraints imposed by discrete device widths and lithography restrictions. MunEDA has addressed these requirements in the WiCkeD product portfolio for IP migration and optimization. In the following we’ll show a workflow for analog design migration, sizing and optimization, for the example of an operational amplifier.