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Circuit Sizing & Optimization Tools

Circuit Optimization made easy!

MunEDA WiCkeD™ Tool Suite

Circuit Sizing, Optimization & Design Centering

MunEDA WiCkeD™ is the industry’s most advanced and powerful EDA tool suite for circuit sizing, performance & yield optimization and design centering. Proven in many industrial design and tape-out IC projects of world-leading semiconductor companies, WiCkeD™ helps the circuit designer to improve the circuit design efficiency, decrease the risk of hidden failures and increase the circuit quality considering statistical variation effects of modern process technologies.

Tools & Features

  • FEO – Feasibility Analysis & Optimization defines and analyses circuit functionality based on the electrical, layout, area a.o. constraints running automatically netlist parametrization and optimizes and fulfills them automatically for best functionality
  • DNO – Deterministic Nominal Optimization – Sensitivity based circuit optimization for nominal (typical) case and worst case operating corners
  • GNO – Global Nominal Optimization – Statistical and stochastic circuit optimization based on sampling and design-space exploration search algorithms
  • YOP – Yield Optimization – Automated circuit yield and robustness optimization for high sigma and performance margins
  • REL – Reliability Option – includes and considers available reliability models and constraints for enhanced aging, degradation, area and other reliability influence factors

Highlights of MunEDA WiCkeD™ Circuit Sizing & Optimization

  • Powerful, fast and efficient automated circuit sizing and tuning including circuit variation
  • Fast Gradient- & Sensitivity-based circuit optimiziation
  • Enhanced global & stochastic circuit optimization
  • Discrete circuit optimization on grid structures for FinFET, FD-SOI, Bipolar
  • Capacity for very large and complex circuits (up to 100k-1M devices)
  • Fully GUI driven or script-based batch-mode setup and execution
  • Constraint management and full specification-driven circuit optimization
  • Proven in wide range of technologies from 350nm CMOS down to 5nm FinFET advanced node PDK

Benefits of MunEDA WiCkeDTM Circuit Sizing & Optimization

  • Automated performance tuning for all kind of custom analog and mixed-signal circuits (amplifier, transceiver, PLL, oscillators, mixer, data converter, filter and many more)
  • Yield, Robustness & High-Sigma optimization for 3-sigma, 6-sigma, 9-sigma and beyond
  • Trade-off improvement and optimization for performances, power, area, delay, noise
  • Minimize power, area, noise, mismatch, parasitics effects, design time & effort
  • Automated Yield, Robustness & Reliability Optimization
  • Fully supports optimization for post-layout effects and parasitics
  • Supports reliability constraints such as aging, degradation, margins, stress, and more
  • Silicon proven in numerous industrial design and tape-out projects of leading worldwide semiconductor companies

MunEDA WiCkeD Circuit Sizing & Optimization Tool Suite can be ideally complemented by

Tool Integration

Integration into standard industry design flow

  • Can be used on all kind of custom analog and mixed-signal IC, IP cells and libraries
  • Integrated and proven with numerous foundry PDK of world leading foundries (FinFET, FD-SOI, bulk CMOS, BiCMOS, Bipolar)
  • Fully integrated into industrial standard circuit design environments with automated highlighting, selection, and backannotation of results from and to framework, netlists and schematics.
  • Integrated with standard waveform viewers, extraction tools, job distribution tools.
  • Easy integration of inhouse simulators and external scripts by open simulation API and scripting interface.

Several user modes available

  • Full-integrated GUI mode with automatic parametrization, constraint setup and back-annotation
  • Easy to invoke netlist-based stand-alone mode integration with your preferred simulator
  • Scripting mode with full scriptable integration of all tools and functions for batch mode operation without GUI

Customer References

MunEDA circuit optimization tools are successfully proven in numerous industrial circuit design projects with global semiconductor companies since many years.

Infineon – Reliability & Yield Optimization of Relaxation Oscillator in Advanced CMOS Process Technology – Yield Improvement by 80% for fresh and 10 Year aged IC with MunEDA WiCkeD variation aware sizing & tuning tools

Samsung System LSI – We use MunEDA’s tools for design optimization and statistical analysis to optimize various optimized memory interface IP blocks for our FinFET technology and achieved an average reduction of design turnaround time of 50%, more than 6% performance improvement and up to 15% area reduction.

STMicroelectronics – Sensitivity Analysis, Performance & Corner Optimization of DDRx High-Speed I/O in 28nm FDSOI Technology using WiCkeDTM NomOpt sizing & tuning tools

After migration to the latest FinFET process node we used MunEDA’s high sigma analysis features to identify in our high performance SRAM memory cells both mismatch and scaled VDD degradation of the read/write stability. Following we have taken advantage of WiCkeD‘s powerful deterministic optimization tools to improve the write signal under consideration of the best area trade-off.

Let’s work together on your
next design project

Use MunEDA tools and support to speed up efficiency,
quality and outcome of your next circuit design project

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