Lantiq – Process Characterization in 40nm and Level Shifter Optimization in 65nm (RF Design)
Session 3.1, G. Golla, Lantiq
MUGM 2013
STMicroelectronics Crolles – WiCkeD/Virtuoso Design Intents Flow for STMicroelectronics CMOS14FDSOI (14nm)
Session 2.3, R. Stewart, STMicroelectronics
Altera – Power and performance optimization with transistor variables on custom circuits using MunEDA WiCkeD
Session 2.2, G. H. Oh, Altera
Berkeley Design Automation – Nanometer Circuit Verification & Analog Characterization Environment
Session 1.4, P. Estrada, Berkeley Design Automation
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