Design for Manufacturability & Design for Yield
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Download the full conference Proceedings (7,9 MB)
MUGM Europe 2007 Presentations
Optimization of I/O Macro Cells with WiCkeD
M. Mauthe, Senior Staff Engineer, Infineon AG
A. Hebenstreit, Staff Engineer, Infineon AG

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Designflow Architecture and Integration of Statistical Sizing Methods in STMicroelectronics Non-Volatile-Memory (NVM) and Automotive Flow
P. Daglio, NVM Mixed-Signal Design Flow Program Manager, STMicroelectronics

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Robust and Reliable Analog Design for Automotive and Sensor Applications by Combining Design Centering and SOA Techniques
U. Sobe, ZMD AG
K.-H. Rooch, ZMD AG

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MunEDA Tools and R&D-Roadmap
F. Schenkel, VP Research & Development, MunEDA GmbH

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Automatic Analog Circuit Synthesis using WiCkeD
X. Wang, Johann-Wolfgang Goethe Universität Frankfurt am Main

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Integration of Statistical Sizing Methods in Infineon Analog-Mixed-Signal-Flow
E. Hennig, CAD Staff Engineer, Infineon AG

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Analysis and Optimization of a CMOS Mixer Circuit
R. Frevert, T. Markwirth, U. Knöchel and R. Jancke, Fraunhofer IIS EAS

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PLL Hierarchical Optimization Methodology Considering Jitter, Power and Locking Time
J. Zou, Qimonda AG
H. Gräb, D. Müller and U. Schlichtmann, Technische Universität München

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Basics of Analog Circuit Modelling and Simulation
R. Sommer, TU Ilmenau / IMMS gGbmH

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WiCkeDTM Circuit Optimization Examples:
A) Optimization and Centering of the Basic Cells of SRAM Memories
B) Performance and Yield Optimization of Sense Amplifier for Automotive Applications

E. Raciti, CAD Engineer, STMicroelectronics

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Qualification of WiCkeDTM for the austriamicrosystems DFM-DFY design flow
T. Mörth, Section Manager Design Support, austriamicrosystems AG

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Technology Setup for WiCkeDTM in X-FAB CMOS and BiCMOS Process for Automotive and Sensor Applications
V. Boos, IMMS gGmbH
H. Wald, X-Fab Semiconductor Foundries AG

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Special Topics:
- IP Porting
- Local Variations (Analog & Digital)

M. Pronath, VP Products & Solutions, MunEDA GmbH

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