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| Testimonials |
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Günter Kornmann, Director Analog Mixed Signal Designflows, Infineon Technologies AG:
"WiCkeD is Infineons state of the art DFM-DFY tool in front-end design and fully integrated into Infineons Communication, Automotive and Memory Designflow. It is used since 2002 in more than 300 design and tape-out projects with Infineon in RF Design, High-Speed Analog, High-Speed Digital, Automotive Power, Embedded Memory, Enhanced Digital Cell Library Modeling, and other applications."
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Pierluigi Daglio, NVM Design & Verification Flows Manager:
"WiCkeD is a perfect tool for circuit analysis, design optimization and yield enhancement. STMicroelectronics has used WiCkeD based on Mentor® Eldo® circuit simulation in numerous benchmarks and real applications and proved it helps to design more robust circuits with a better yield."
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Peter Gasteiner, Senior Vice President and General Manager of austriamicrosystems business unit Full Service Foundry:
"Supporting MunEDA´s state-of-the-art design analysis and optimization tool "WiCkeD" is a further step in the continuous improvement of austriamicrosystems DFM reference design flow. Supporting our customers to maximize their production yield and ensure robustness of their analog designs gives us a clear competitive advantage and strengthens our position as a leading supplier of specialty process technologies and extended foundry services."
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Thomas Hötzel, Chief Technology Officer, ZMD AG, Dresden:
"After testing MunEDA´s design and yield optimization tool WiCkeD in some very successful pilot projects, we chose it for analysis and optimization of analog and mixed-signal circuits and towards increased yield and robustness of our golden IP library."
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Dr. Peter Zdebel, Senior Vice President and CTO of ON Semiconductor:
"Having WiCkeD tested very successfully in several projects for CMOS, BiCMOS and Bipolar circuit design, we are convinced about the outstanding capabilities regarding circuit design performance and yield analysis and optimization features. We will use the MunEDA tool suite WiCkeD on a worldwide basis to further address our customer´s demand for high-end quality products within a still shortened timeframe."
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Thomas Hsieh, R&D Associate Vice President, Faraday Technology Corp.:
"MunEDA´s WiCkeD showed the capability as an optimization tool in the key role of our IP porting project. The capacity is a general issue for the simulation-based optimization tool. We successfully could demonstrate the circuit optimization process through the comprehensive GUI and script based flow."
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Dr. Manfred Dietrich, Head of Department Mixed-Signal Systems, Fraunhofer IIS EAS:
"With WiCkeD all selected performances have fulfilled the specifications. The yield of the analyzed and optimized CMOS mixer circuit could be increased up to 100%."
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Dr. Young-doo Choi, Senior Manager CAO Design Automation Team at Hynix:
"MunEDA´s tools are best-in class for interactive and fully automatic yield analysis and optimization in circuit design. As for every semiconductor company, design targets like high performance and yield are number one research goals that imply both profitability and time to market. We added MunEDA´s solutions to Hynix design environment to follow our track in establishing best design methodologies to our design goups and therefore improve quality assurance to our customers."
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Thomas Ramsch, director of design support at X-FAB:
"Designing mixed-signal ICs is challenging and complex. We are pleased to add MunEDA´s methodologies for circuit performance, statistical analysis and yield optimization to our full statistical modeling support. This powerful software helps our customers make their analog/mixed-signal designs more robust and get to market faster."
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Sancho Park, CEO of DAOU Xilicon, Korea:
"MunEDA´s solutions address the most critical problems of todays circuit design - the decreasing manufacturing yield and thus robustness and reliability of designed and produced circuits. MunEDA´s tools accurately predict and maximize the expected manufacturing yield and help the designers to identify critical structures within the circuit. The combination of MunEDA´s DFM-DFY solutions and DAOU Xilicons expertise in the Korean market will help our customers to increase design efficiency as well as product yield and reliability."
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Robert Bosch GmbH (From ANASTASIA report):
"Using the WiCkeD tools from MunEDA the designer undertakes a sequence of steps and methodologies that guide to a ready sized analog circuit. Within these steps both the operation region (temperature, supply voltage) as well as the statistical process variations will be considered. Additionally the developer gets estimation about the expected yield. With the consequent use of these methods at least 2 redesigns per year can be saved. This leads to improved time-to-market and lower development costs." (from ANASTASIA2 Report www.edacentrum.de/projektspiegel/projektspiegel_anastasia2_032005.html)
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Seunghwan Lee, Senior Research Engineer, Design Automation Team at Hynix:
"After successfully using MunEDA design analysis and optimization tools for several circuits like pre-amplifiers and latches for automotive applications we have seen the large capabilities our designers can gain when they design circuits in high-end process technologies. As historically used process corners are too pessimistic and not realistic for todays designs, MunEDA´s deterministic circuit analysis and optimization helps us to speed up the design process and to avoid unwanted redesigns."
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Harald Schmidt-Habich, Principal Design Methodology, Automotive, Infineon Technologies AG:
"WiCkeD has been seamlessly integrated in Infineons Automotive Designflow for several flow versions. The carefree operation of WiCkeD is starting from the design framework and is used for semi-automatic circuit sizing. This tool and integration has shown to be very valuable for the designers because it allows them to use a completely GUI-based operation of WiCkeD inside the design framework. The database and ADE states are used to keep the information consistent and the designer's setup effort small."
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Dr. habil. Peter Schwarz, Head of the Modelling and Simulation Department of Fraunhofer IIS/EAS Dresden:
"Starting this cooperation is a logical consequence from our meanwhile more than 2 years informal common activities. Fraunhofer IIS will contribute to this partnership our well established and deep understanding and experience in behavioural modelling, analysis and optimization. With MunEDA as a strong EDA partner we will meet the design challenges of our customers and partners."
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Dr. Gerhard Rappitsch, Principal Engineer DFM (Design for Manufacturability) austriamicrosystems AG:
"A yield optimisation of an IP block was carried out using automated simulation based design centering and verification by experimental results. First, critical process parameters have been determined by sensitivity analysis allowing the improvement of production yield for the initial design by adjusting the PMOS threshold implant dose. In a second step a new set of design parameters was determined by simulation based yield optimisation where the goal was to keep the device area as small as possible and to maximize the worst-case-distance. The quality of the simulation results heavily relies on the accuracy of SPICE simulation models (Monte Carlo models) reflecting the global and local variations of the production process."
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David Wu, R&D Technical Director, Faraday Technology Corp.:
"We successfully used the script language provided by WiCkeD in the optimization plan to drive the porting process in less than 1,5 hours from 0,18µm to 90nm (including layout). Its quite impressive. The same task requires days of efforts for a regular designer. The simple setup procedure and intuitive flow make it a useful tool kit for automatic circuit optimization."
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Carlo Roma, CAD Engineer, STMicroelectronics:
"This analysis has been useful to demonstrate that the yield loss for the first topology was due to mismatch components, due to the need to generate constant differences and ratios of currents with transistor pairs. The yield has been increased reducing the relevant mismatch pairs after design centering with WiCkeD (Bandgap-Optimization Project from ISQED2005)."
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Thomas Hötzel, Chief Technology Officer, ZMD/ZFOUNDRY, Dresden:
"WiCkeD is well integrated into our standard design flow and supported by ZFOUNDRY's design kits for CMOS, DMOS and bipolar technologies. With MunEDA´s leading tools for DFM-DFY on circuit level, we will ensure to meet the next level of design and quality challenges of our customers."
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Prof. Dr. Franz Rössler, Head of IMMS Institute in Erfurt:
"With several years of common methodology activities in the area DFM-DFY IMMS together with partner MunEDA further improved its outstanding knowledge in DFM-DFY application. We will expand this cooperation together with our customers and industry partners to enhance our leading position regarding design specific DFM-DFY applications with a special but not exclusive focus on automotive and sensor applications."
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Yeong-Jar Chang, Deputy Director of Infrastructure R&D Center, Faraday Technology Corp.:
"Analog synthesis is a dream feature for IP vendors. Faraday has been accumulating the experience and capability of analog IP porting as well as analog synthesis. We appreciate WiCkeD can help on this..."
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Chin-Lung King, CEO of GTI Inc., Taiwan:
"As we know from our activities with customers in Taiwan, MunEDA offers best-in-class DFM-DFY tools for analysis and optimization of circuit performance and yield. We see strong demand from semiconductor companies in Taiwan for such innovative and powerful solutions. Especially the unique performance and yield analysis features but also the deterministic optimizers built into MunEDA’s software tool WiCkeD enable our customers to successfully address the high challenges of submicron and nano technologies."
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