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STMicroelectronics - MunEDA
Antonio Colaci, Gianluigi Boarin, Andrea Roggero, Lorenzo Civardi, Carlo Roma, Gunter Strube, Andreas Ripp and Michael Pronath
Systematic Analysis & Optimization of Analog/Mixed-Signal Circuits Balancing Accuracy and Design Time
SBCCI 2010 - 23rd Symposium on Integrated Circuit and Systems Design, September 2010, Sao Paulo, Brazil
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U. Sobe, A. Graupner, E. Böhme ZMD AG, Dresden, Germany
A. Ripp, M. Pronath, MunEDA GmbH, Munich, Germany
Analog IP Porting by Topology Conversion and Optimization
IP - ESC 2009, December 2009, Grenoble, France
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U. Sobe, K.-H. Rooch, D. Mörtl, A. Graupner, ZMD AG, Dresden, Germany
A. Ripp, M. Pronath, MunEDA GmbH, Munich, Germany
Robust Analog Design for Automotive Applications by Design Centering With Safe Operating Areas
May 2009, Semiconductor Manufacturing, IEEE Transactions on
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K.-H. Rooch, U. Sobe, ZMD AG, Dresden, Germany
A. Ripp, M. Pronath, MunEDA GmbH, Munich, Germany
Robust Analog Design for Automotive Aplications by Design Centering with Safe Operating Areas
ISQED´08, March 2008, San Jose, CA, USA
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A. Ripp, MunEDA GmbH, Munich, Germany
Challenges of reliability oriented design strategies for analog and mixed-signal circuits
MEDEA-DAC 2007, May 2007, Grenoble, France
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A. Ripp, MunEDA GmbH, Munich, Germany (Chair)
R. Sommer, IMMS - TU Ilmenau
M. Pronath, MunEDA GmbH, Munich, Germany
Design Tutorial DfY-DfM - Design for Yield and Manufacturability
ZuD 2007 - Reliability and Design, March 2007, Munich, Germany
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O. Eisenberger, G. Rappitsch, austriamicrosystems AG, Unterpremstaetten, Austria
B. Obermeier, A. Ripp, M. Pronath, MunEDA GmbH, Munich, Germany
Yield Optimisation of Power-On Reset Cells and Functional Verification - Power-on Reset Cell (POR) in 350nm CMOS Technology
ANALOG06, September 2006, Dresden, Germany
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G. Rappitsch, O. Eisenberger, austriamicrosystems AG, Unterpremstaetten, Austria
B. Obermeier, A. Ripp, M. Pronath, MunEDA GmbH, Munich, Germany
Experimental Verification of Simulation Based Yield Optimization for Power-On Reset Cells
CICC 2006, September 2006, San Jose, CA, USA
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A. Ripp, MunEDA GmbH, Munich, Germany
ANASTASIA+ - Successful bridge from basic methodology research to industrial design tool delivery
MEDEA-DAC 2006, May 2006, Prien, Germany
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A. Ripp, MunEDA GmbH, Munich, Germany (Chair)
M. Bühler, J. Koehl, IBM Deutschland Entwicklung GmbH, Böblingen, Germany
J. Bickford, J. Hibbeler, IBM Inc., Burlington, USA
U. Schlichtmann, Technical University Munich, Germany
R. Sommer, Infineon Technologies AG, Munich, Germany
M. Pronath, A. Ripp, MunEDA GmbH, Munich, Germany
DATE 2006 Special Session: DFM/DFY Design for Manufacturability and Yield - influence of process variations in digital, analog and mixed-signal circuit design
DATE06, March 2006, Munich, Germany
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A. Ripp, MunEDA GmbH, Munich, Germany
Robustness and Reliability - Facing new Quality Levels for Automotive ICs with Design for Yield
EuroDesignCon 2005, October 2005, Munich, Germany
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M. Pronath, A. Ripp, MunEDA GmbH, Munich, Germany
Advanced Mathematical and Computational Methods fort he Design Centering of Electronic Circuits
SCEE Summer School 2005, September 2005, Capo D'Orlando, Sicily, Italy
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U. Schlichtmann, G. Stehr, T. Massier, H. Gräb, Technical University Munich, Germany
R. Sommer, E. Hennig, Infineon Technoologies AG, Munich, Germany
F. Schenkel, A. Ripp, MunEDA GmbH, Munich, Germany
Systematischer Analog/Mixed-Signal-Entwurf und Designsicherheit
EKOMPASS04, May 2004, Hannover, Germany
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A. Ripp, MunEDA GmbH, Munich, Germany (Chair)
R. Sommer, E. Hennig, Infineon Technologies AG, Munich, Germany
M. Pronath, A. Ripp, MunEDA GmbH, Munich, Germany
Design Tutorial DFY/DFM - Design for Yield and Manufacturability
DATE04, February 2004, Paris, France
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A. Ripp, MunEDA GmbH, Munich, Germany (Chair)
R. Sommer, E. Hennig, Infineon Technologies AG, Munich, Germany
F. Schenkel, M. Pronath, A. Ripp, MunEDA GmbH, Munich, Germany
Tutorial Design for Manufacturability: Statistical Analysis and Yield Optimization of analog integrated circuits
ANALOG03, September 2003, Heilbronn, Germany
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