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R. Schwencker, J. Eckmüller, H. Gräb, K. Antreich, Technical University Munich, Germany
Automating the Sizing of Analog CMOS Circuits by Consideration of Structural Constraints
DATE 1999, March 1999, Munich, Germany
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S. Zizala, J. Eckmüller, H. Gräb, K. Antreich, Technical University Munich, Germany
Effiziente Modellierung integrierter analoger CMOS-Schaltungen durch Berücksichtigung von Struktureigenschaften
ANALOG99, February 1999, Munich, Germany
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J. Eckmüller, G. Strube, H. Gräb, Technical University Munich, Germany
Diagnose für integrierte Analogschaltungen
ANALOG96, October 1996, Berlin, Germany
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K. Antreich, H. Gräb, C. Wieser, Technical University Munich, Germany
Circuit Analysis and Optimization Driven by Worst-Case Distances
IEEE Transactions CAD, January 1994, ,
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K. Antreich, H. Gräb, Technical University Munich, Germany
Circuit Optimization Driven by Worst-Case Distances
ICCAD 1991, November 1991, Santa Clara, CA, USA
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M. Pronath, H. Gräb, K. Antreich, Technical University Munich, Germany
Parametric Test of Mixed-Signal ICs under Consideration of the Impact of Test Stimulus Imprecisions
Technical Report TUM-LEA-01-1, , Munich, Germany
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M. Pronath, H. Gräb, K. Antreich, Technical University Munich, Germany
Fault Simulation and Test Design for Floating Gate Defects in Analog Integrated Circuits Using Power-Down Circuitry
Technical Report TUM-LEA-01-3, , Munich, Germany
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F. Schenkel, M. Pronath, S. Zizala, R. Schwencker, H. Gräb, K. Antreich, Technical University Munich, Germany
Direct Yield Optimization of Analog Integrated Circuits Considering Global and Local Process Tolerances
Technical Report TUM-LEA-00-1, , Munich, Germany
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F. Schenkel, M. Pronath, H. Gräb, K. Antreich, Technical University Munich, Germany
Detection of Matching Transistor Pairs Using Circuit Sensitivities
Technical Report TUM-LEA-00-2, , Munich, Germany
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