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-Constraints-in-Analog-Circuits.jpg) |
U. Sobe, K.-H. Rooch, D. Mörtl, A. Graupner, ZMD AG, Dresden, Germany
A. Lerch, X-Fab Semiconductor Foundries AG, Erfurt, Germany
M. Pronath, MunEDA GmbH, Munich, Germany
Verification of Safe Operating Area (SOA) Constraints in Analog Circuits
ZuE 2008 - Reliability and Design, September 2008, Ingolstadt, Germany
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Atmel, Bosch, Cadence, Infineon, MunEDA, Qimonda
VeronA - Verification of Analog Circuits - BMBF Project 01 M 3079 edacentrum
DATE08, March 2008, Munich, Germany
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K.-H. Rooch, U. Sobe, ZMD AG, Dresden, Germany
A. Ripp, M. Pronath, MunEDA GmbH, Munich, Germany
Robust Analog Design for Automotive Aplications by Design Centering with Safe Operating Areas
ISQED´08, March 2008, San Jose, CA, USA
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