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R. Schwencker, F. Schenkel, M. Pronath, H. Gräb, Technical University Munich, Germany
Dimensionierung analoger integrierter Schaltungen mittels adaptiver Worst-Case-Parametersätze
GMM/ITG Diskussionssitzung Entwurf von Analogschaltungen 2002, May 2002, Bremen, Germany
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M. Pronath, H. Gräb, K. Antreich, Technical University Munich, Germany
Simulation und Testentwurf für Floating-Gate Defekte (FGD) in analogen integrierten Schaltungen
GMM/ITG Diskussionssitzung Entwurf von Analogschaltungen 2002, May 2002, Bremen, Germany
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M. Pronath, H. Gräb, K. Antreich, Technical University Munich, Germany
Design of Optimal Implicit Tests for Parametric Faults considering Errors of Test Stimuli and Measurements
European Test Workshop 2002, May 2002, Korfu, Greece
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M. Pronath, H. Gräb, K. Antreich, Technical University Munich, Germany
Der Einfluss von Ungenauigkeiten im Teststimulus auf den Test analoger Schaltungen
ITG/GI-Workshop 2002, March 2002, Bad Herrenalb, Germany
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R. Schwencker, F. Schenkel, M. Pronath, H. Gräb, Technical University Munich, Germany
Analog Circuit Sizing using Adaptive Worst-Case Parameter Sets
DATE02, February 2002, Paris, France
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M. Pronath, H. Gräb, K. Antreich, Technical University Munich, Germany
A Test Design Method for Floating Gate Defects (FGD) in Analog Integrated Circuits
DATE02, February 2002, Paris, France
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F. Schenkel, M. Pronath, H. Gräb, Technical University Munich, Germany
WiCkeD 3: Design Centering and Mismatch Analysis for Analog Integrated Circuits
DATE02, February 2002, Paris, France
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R. Schwencker, F. Schenkel, M. Pronath, H. Gräb, Technical University Munich, Germany
Analog Circuit Synthesis Based on an Iterative Relaxed Worst-Case Formulation
DATE 2002, February 2002, Munich, Germany
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