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M. Pronath, H. Gräb, K. Antreich, Technical University Munich, Germany
On Parametric Test Design for Analog Integrated Circuits considering Error in Measurement and Stimulus
Modeling, Simulation and Optimization of Integrated Circuits 2001, November 2001, Oberwolfach, Germany
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S. Zizala, J. Eckmüller, Infineon Technologies, Munich
K. Antreich, H. Gräb, Technical University of Munich
The sizing rules method for analog integrated circuit design
ICCAD 2001, November 2001, San Jose, CA, USA
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F. Schenkel, M. Pronath, S. Zizala, R. Schwencker, H. Gräb, K. Antreich, Technical University Munich, Germany
Mismatch Analysis and Direct Yield Optimization by Spec-Wise Linearization and Feasibility-Guided Search
DAC 2001, June 2001, Las Vegas, NV, USA
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M. Pronath, H. Gräb, K. Antreich, Technical University Munich, Germany
Estimation of the Influence of Test Stimulus Precision on Test Quality for Parametric Faults in Analog Integrated Circuits
IEEE Mixed Signal Test Workshop 2001, June 2001, Atlanta, GA, USA
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F. Schenkel, M. Pronath, H. Gräb, K. Antreich, Technical University Munich, Germany
A Fast Method for Identifying Matching-Relevant Transistor Pairs
CICC 2001, May 2001, San Diego, CA,USA
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V. Glöckel, M. Pronath, H. Gräb, Technical University Munich, Germany
Deterministischer parametrischer Testentwurf für analoge integrierte Schaltungen mit Testbeobachtungen unter Anwendung von Ergebnissen aus dem Toleranzentwurf
ITG/GI-Workshop 2001, February 2001, Miesbach, Germany
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