Design for Manufacturability & Design for Yield
HomeProductsApplication AreasE-LearningCustomersPartnersNewsEventsUser Group MeetingsCompanyContact & DistributorsWebEx
Customers »
Publications

All | 2011 | 2010 | 2009 | 2008 | 2007 | 2006 | 2005 | 2004 | 2003 | 2002 | 2001 | 2000 | Older
MEDEA – Innovative Design Techniques Speed Analogue/Digital IC Development
December 2000, Munich, Germany
Download Document: PDF
K. Antreich, J. Eckmüller, H. Gräb, M. Pronath, F. Schenkel, R. Schwencker, S. Zizala, Technical University Munich, Germany
WiCkeD: Analyse und Dimensionierung analoger Schaltungen unter Berücksichtigung von Mismatch
ITG/GI-Workshop 2000, November 2000, Darmstadt, Germany

Download Document: [Link]
M. Pronath, V. Gloeckel, H. Gräb, Technical University Munich, Germany
A Parametric Test Method for Analog Components in Integrated Mixed-Signal Circuits
ICCAD 2000, November 2000, San Jose, CA, USA

Download Document: [Link]
K. Antreich, J. Eckmüller, H. Gräb, M. Pronath, F. Schenkel, R. Schwencker, S. Zizala, Technical University Munich, Germany
WiCkeD: Analog circuit synthesis incorporating mismatch
CICC 2000, May 2000, Orlando, FL, USA

Download Document: [Link]
R. Schwencker, F. Schenkel, H. Gräb, K. Antreich, Technical University Munich, Germany
The Generalized Boundary Curve - A Common Method for Automatic Nominal
DATE 2000, March 2000, Paris, France

Download Document: [Link]
M. Pronath, Technical University Munich, Germany
Testentwurf für analoge Komponenten gemischt analog-digitaler Schaltungen basierend auf der Auswertung des Übertragungsverhaltens
AES 2000, January 2000, Karlsruhe, Germany

Download Document: [Link]