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Tutorials, Customer and Reference Cases
Following, is a list of MunEDA customers and reference cases regarding Design for Manufacturability and Yield projects as well as additional references and detailed
application cases. You can also download our Customer Reference Booklet.
Quick reference:
austriamicrosystems |
Bosch |
Faraday |
Fraunhofer |
IMMS |
Infineon |
Melexis |
Qimonda |
STMicroelectronics |
X-Fab |
ZFoundry |
ZMD |
ANASTASIA |
HONEY |
Sigma65 |
Cadence® |
Edacentrum |
MEDEA |
Mentor Graphics |
Synopsys |
TUM |
65nm |
90nm |
130nm |
180nm |
350nm |
600nm |
800nm
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Faraday Technology Corporation
June 2007, Hsin-Chu/Munich, Taiwan/Germany
An IP Porting System for Analog Libraries
Circuit Reference Case: Controllable delay line in 90nm CMOS Technology
Download Document: 
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Infineon Technologies
MUGM Europe 2006
September 2006, Munich, Germany
Modelling of the parametric yield in decananometer SRAM-Arrays
Circuit Reference Case: Sense-Amplifier for SRAM-Memory in 90nm and 65nm CMOS Technology
Download Document:
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STMicroelectronics
MUGM Europe 2006
September 2006, Munich, Germany
WiCkeD Circuit Analysis and Yield Improvement Methodology
Circuit Reference Case: A) Bandgap Voltage Reference in 90nm CMOS Technology; B) Sense Amplifier in 130nm CMOS Technology
Download Document:
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STMicroelectronics
July 2006, Agrate, Italy
Analysis and Optimization of Mismatch in Analog Designs with WiCkeD
Circuit Reference Case:
A) Sense Amplifier for SRAM in 130nm CMOS Technology
B) Bandgap Voltage Reference in 90nm CMOS Technology
Download Document:
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Qimonda - TUM
DAC 2006
July 2006, San Francisco, CA, USA
A CPPLL Hierarchical Optimization Methodology Considering Jitter, Power and Locking Time
Circuit Reference Case: Charge Pump - Phased Locked Loop (PLL) in 90nm CMOS Technology
Download Document: [Link]
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Infineon Technologies
BMAS 05
September 2005, San Jose, CA, USA
Fast Automatic Sizing of a Charge-Pump Phase-Locked Loop based on behavioral Models
Circuit Reference Case: Phased Locked Loop (PLL) in 90nm CMOS Technology
Download Document:
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STMicroelectronics
ISQED 05
March 2005, San Jose, CA, USA
How Circuit Analysis and Yield Optimization Can Be Used to Detect Circuit Limitations before Silicon Results
Circuit Reference Case: Bandgap Voltage Reference in 90nm CMOS Technology
Download Document:
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Find more application cases here or contact us to get more information on real-life customer projects.
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