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Tutorials, Customer and Reference Cases Following, is a list of MunEDA customers and reference cases regarding Design for Manufacturability and Yield projects as well as additional references and detailed application cases. You can also download our Customer Reference Booklet. Ordered by customers: austriamicrosystems \| Bosch \| Faraday \| Fraunhofer \| IMMS \| Infineon \| Melexis \| Qimonda \| STMicroelectronics \| X-Fab \| ZFoundry \| ZMD Ordered by industrial projects: ANASTASIA \| HONEY \| Sigma65 Ordered by partners & memberships: Cadence® \| Edacentrum \| MEDEA \| Mentor Graphics \| Synopsys \| TUM Ordered by technologies: 65nm \| 90nm \| 130nm \| 180nm \| 350nm \| 600nm \| 800nm
	X-Fab - ZMD - MunEDA ZuE 2008 - Reliability and Design September 2008, Ingolstadt, Germany Verification of Safe Operating Area (SOA) Constraints in Analog Circuits Download Document:
	X-Fab - IMMS - MunEDA edaWorkshop 2008 May 2008, Hannover, Germany Technology Setup for WiCkeD in X-FAB CMOS and BiCMOS Processes for Automotive and Sensor Applications Download Document:
	Fraunhofer - MunEDA edaWorkshop 2008 May 2008, Hannover, Germany Analysis and Optimization of a CMOS Mixer Circuit with WiCkeD Download Document:
	STMicroelectronics - Infineon - X-Fab - MunEDA - IMMS MEDEA+ Annual Forum 2007 November 2007, Budapest, Hungary HONEY – Highly Optimized Design Methods for Yield and Reliability Download Document:
	STMicroelectronics - Mentor Graphics - MunEDA MUGM Europe 2007 September 2007, Munich, Germany Designflow Architecture and Integration of Statistical Sizing Methods in STMicroelectronics Non-Volatile-Memory (NVM) and Automotive Flow based on MunEDA-WiCkeD and Mentor-Eldo Download Document:
	Faraday Technology Corporation June 2007, Hsin-Chu/Munich, Taiwan/Germany An IP Porting System for Analog Libraries Circuit Reference Case: Controllable delay line in 90nm CMOS Technology Download Document:
	Infineon - Fraunhofer - MunEDA - Sigma65 June 2007, Hannover, Germany 65nm Technology Based Modelling and Analysis Methodologies based on Variations Circuit Reference Case: Digital Cell Libraries (SSTA) in 65nm CMOS Technology Download Document: [Link]
	ZMD AG ZuD 2007 - Reliability and Design March 2007, Munich, Germany Robust Analog Design for Automotive Applications by Design Centering Circuit Reference Case: Fully differential folded cascode OTA in 600nm CMOS Technology Download Document:
	ZMD - ZFoundry September 2006, Dresden, Germany ZMD-ZFoundry Circuit Design-for-Yield (DFY) using WiCkeD - 110dB Op-Amp for Automotive and Sensor Applications Circuit Reference Case: High Gain Operational Transconductance Amplifier in 600nm CMOS Technology Download Document:
	austriamicrosystems ANALOG06 September 2006, Dresden, Germany Yield Optimisation of Power-On Reset Cells and Functional Verification Circuit Reference Case: Power-on Reset Cell (POR) in 350nm CMOS Technology Download Document:
	IMMS MUGM Europe 2006 September 2006, Munich, Germany Topology Reuse with WiCkeD Circuit Reference Case: Topology Reuse with WiCkeD Download Document:
	Infineon - TUM MUGM Europe 2006 September 2006, Munich, Germany 6T SRAM Six Sigma Design with WiCkeD Circuit Reference Case: SRAM Memory Cell Download Document:
	Infineon Technologies MUGM Europe 2006 September 2006, Munich, Germany Modelling of the parametric yield in decananometer SRAM-Arrays Circuit Reference Case: Sense-Amplifier for SRAM-Memory in 90nm and 65nm CMOS Technology Download Document:
	STMicroelectronics MUGM Europe 2006 September 2006, Munich, Germany WiCkeD Circuit Analysis and Yield Improvement Methodology Circuit Reference Case: A) Bandgap Voltage Reference in 90nm CMOS Technology; B) Sense Amplifier in 130nm CMOS Technology Download Document:
	ZMD AG MUGM Europe 2006 September 2006, Munich, Germany Automotive Circuit Design for Yield Circuit Reference Case: 110 dB Operational Amplifier for Automotive and Sensor Applications in 600nm CMOS Technology Download Document:
	ZMD - MunEDA ANALOG06 September 2006, Dresden, Germany Circuit Design-for-Yield (DFY) for a 110dB Op-Amp for Automotive and Sensor Application Download Document:
	austriamicrosystems July 2006, Unterpremstaetten, Austria austriamicrosystems Design for Manufacturability (DFM) reference design flow using MunEDA DFM-DFY tool WiCkeD Circuit Reference Case: Power-on Reset (POR) in 350nm CMOS Technology Download Document:
	STMicroelectronics July 2006, Agrate, Italy Analysis and Optimization of Mismatch in Analog Designs with WiCkeD Circuit Reference Case: A) Sense Amplifier for SRAM in 130nm CMOS Technology B) Bandgap Voltage Reference in 90nm CMOS Technology Download Document:
	Qimonda - TUM DAC 2006 July 2006, San Francisco, CA, USA A CPPLL Hierarchical Optimization Methodology Considering Jitter, Power and Locking Time Circuit Reference Case: Charge Pump - Phased Locked Loop (PLL) in 90nm CMOS Technology Download Document: [Link]
	Infineon Technologies BMAS 05 September 2005, San Jose, CA, USA Fast Automatic Sizing of a Charge-Pump Phase-Locked Loop based on behavioral Models Circuit Reference Case: Phased Locked Loop (PLL) in 90nm CMOS Technology Download Document:
	STMicroelectronics ISQED 05 March 2005, San Jose, CA, USA How Circuit Analysis and Yield Optimization Can Be Used to Detect Circuit Limitations before Silicon Results Circuit Reference Case: Bandgap Voltage Reference in 90nm CMOS Technology Download Document:
	IMMS EUROSOI 05 January 2005, Granada, Spain Linear Regulators for High Temperature Applications Circuit Reference Case: Linear LDO Regulator in 1.0µm SOI-Technology Download Document:
	Bosch - Infineon MEDEA+ Forum 2004 November 2004, Paris, France Systematic Analog/Mixed-Signal Design - Yield Optimization of Analog Circuits with WiCkeD Circuit Reference Case: A) Complementary folded cascode transconductance Amplifier in 130nm CMOS B) Operational Amplifier for Automotive Applications in 800nm BiCMOS Technology Download Document:
	Infineon - MunEDA - TUM Ekompass Workshop May 2004, Hannover, Germany Systematic Analog/Mixed-Signal Design and Design Accuracy Circuit Reference Case: FC OpAmp in 130nm CMOS Technology Download Document:
	Edacentrum - Infineon - STMicroelectronics - Bosch - Cadence - Synopsys - MunEDA DATE04 February 2004, Paris, France MEDEA EDA R&D in Europe - Does it Make Sense? Download Document: [Link]
	Infineon - MunEDA - MEDEA - ANASTASIA DATE04 February 2004, Paris, France Industrial Design Tutorial - DFY/DFM - Design for Yield and Manufacturability Circuit Reference Case: Complementary-folded Cascode OpAmp (130nm) Download Document:
	IMMS - Melexis - X-Fab - Infineon - Cadence - MunEDA Workshop Design Centering 2004 January 2004, Erfurt, Germany Design Efficiency and Yield Improvement in Analog Design with WiCkeD Download Document:
	austriamicrosystems ESSCIRC September 2003, Estoril, Portugal Statistical Spice Modelling for analog circuit design, G. Rappitsch, MOS-AK: Advanced Compact Modeling Workshop Circuit Reference Case: Standard Library OpAmp Download Document: [Link]
	Infineon - MunEDA ANALOG03 September 2003, Heilbronn, Germany Tutorial Design for Manufacturability: Statistical Analysis and Yield Optimization of analog integrated circuits Download Document:
	Infineon - MunEDA DATE03 March 2003, Munich, Germany Design for Manufacturablity Circuit Reference Case: Fully-Cascode OpAmp in 180nm CMOS Technology Download Document:
	Infineon Technologies MEDEA+ DAC 2002 October 2002, Stresa Lago Maggiore, Italy Top-Down Design Methods for Mixed-Signal Applications Download Document:
Find more application cases here or contact us to get more information on real-life customer projects.