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Memory Design Challenges
A main application area of MunEDA´s WiCkeD design analysis, modeling and optimization tools and solutions is the specification-driven transistor-level sizing and analysis of memory cells and memory interface circuits in various types like volatile memory (SRAM, DRAM, a.o.), nonvolatile memory (Flash, EEPROM, a.o.), FPGA and others.
Many of these circuits have to keep tight specifications on high-speed transient signals, under varying operating conditions, process conditions and mismatch. When analyzing data paths in memory cells, netlists with large load models and many parasitic elements are usual. Particularly non-volatile memory cells should be optimized for high robustness against local variation because they are instantiated in large numbers on a chip.
MunEDA Tools for Memory Design
MunEDA WiCkeD contains a large toolbox of analysis, modeling and sizing tools. MunEDA WiCkeD contains high performance optimization methods that are specialized for performance tuning and robustness optimization of memory cells. MunEDA WiCkeD’s highly efficient statistical analysis methods help memory designers to assess and optimize robustness of memory cells vs. performance, power consumption and area.
Typical Circuits for
Memory Design |
Typical Performance Metrics for
Memory Design |
- Memory Cells
- Sense Amplifiers
- Charge Pumps
- Oscillators
- Receiver Paths
- Decoders
- Timers
- Bandgap References
- Multiplexers
- ...and more
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- Write Time
- Static Noise Margin
- Leakage current
- Power Consumption
- Glitch
- Offset
- Accuracy
- Delays
- Pin-to-pin skew
- ...or similar
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Customer Success Memory Design
with MunEDA WiCkeD Tools
Eugene Chen, Director of CAD and Systems Administration, Altera:
"Since we started using WiCkeD in circuit design, we achieved significant improvements of design efficiency, quality and yield in many projects like our Stratix and Cyclone FPGA series."
SRAM
 Infineon - 6T for Embedded SRAM - six sigma design with WiCkeD
 STMicroelectronics - WiCkeD Circuit Optimization Examples: Optimization and Centering of the Basic Cells of SRAM Memories
 Infineon - Statistical effects of NBTI degradation in SRAM cells
DRAM
 Hynix - Using WiCkeD in DRAM Development
FLASH - NVM - EEPROM
 STMicroelectronics - Circuit Analysis and Yield Optimization for critical Analog Blocks in Non Volatile Memories Applications
 Anvo-Systems Dresden - WiCkeD for nvSRAM Multi Corner Optimization
FPGA
 Altera - Applications of WiCkeD in FPGA Cell Design
Seunghwan Lee, Senior Research Engineer, Design Automation Team at Hynix:
"As historically used process corners are too pessimistic and not realistic for todays designs, MunEDAs deterministic circuit analysis and optimization helps us to speed up the design process and to avoid unwanted redesigns."
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